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Machine Learning-based Optimal SI/PI Design for 3D ICs
Machine Learning-based Optimal SI/PI Design for 3D ICs
As the demand on higher performance such as channel speed, bandwidth, and low power is increasing, the complexity of the 2.5-D/3D IC design is gradually increasing to ensure the signal/power integrity. Moreover, time-to-market is getting shorter in order to respond quickly to market trends and customer needs. Therefore, time-efficient and accurate optimal 2.5D/3D IC design is necessary in these days.
Our lab’s machine learning (ML)-based SI/PI design group focused on the implementation of the optimal SI/PI design automation for high-speed channels and power distribution networks based on machine learning techniques. Fig. 1 shows the overall concept of the machine learning-based optimal SI/PI design method. For a given packages for 2.5D/3D ICs, optimal layout design satisfying the target specification such as eye opening and P/G noise margin can be provided by the ML-based SI/PI design method. ML-based design can provide accurate data-driven results instead of engineer knowledge (heuristics) and is computing cost effective method.
Fig. 1 Machine learning-based optimal signal integrity/power integrity (SI/PI) design
High-speed channels and power distribution networks (PDNs) must be simulated to ensure signal/power integrity in the early stage of the entire design process for the reduction of the time and cost. However, the time to simulate the entire channels and PDNs by conventional EM, circuit simulators has been longer as the complexity of the design is increased. The estimation of the SI/PI results and model parameters using the deep neural network (DNN) can save time and cost than the conventional simulations. Because the DNN can automatically solve the non-linearity relationship between input and output, DNN can accurately estimate/model the electrical characteristics of design parameters such as high speed channels, power distribution networks, and through silicon vias (TSVs) to obtain outputs such as eye diagram, P/G noise and TSV models as shown Fig. 2.
Fig. 2 Deep Neural Network (DNN)-based SI/PI results estimation
Fig. 3 shows the comparison between simulation and DNN which estimate the eye height and eye width of the high speed memory channel in HBM interposer. The estimation using DNN is accurate. As a result, the DNN can be used in many ways in the SI/PI field.
Fig. 3 Comparison between simulation and DNN model which estimate the eye height and eye width
Optimal layout design can be performed by reinforcement learning (RL) as shown in Fig. 4. By using RL algorithms, optimal layout design guideline which is optimal policy can be learned through reward (feedback) mechanisms depending on the target specifications of SI/PI. Therefore, high speed channels and power distribution networks (PDNs) can be designed through the RL-based optimal design method. Fig. 5 shows the results of the RL-based optimal decoupling capacitor design method. As shown in Fig. 5, the self PDN impedance of optimized PDN satisfied the target impedance and simultaneous switching noise (SSN) is suppressed.
Fig. 4 Reinforcement learning (RL)-based optimal SI/PI design method
Fig. 5 PDN self impedance and simultaneous switching noise (SSN) of the optimized PDN by the RL-based optimal design method
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