Signal Integrity Lectures
Team Projects
Team 1. Signal Integrity Design and Analysis of DPDT for 5G NR FR2
Team 2. Signal Integrity Analysis of D2D Interface for Chiplet
Team 4. Signal Integrity Analysis of RDL Interposer
Team 6. Signal Integrity Analysis and Design of Bump-less Channel
Team 7. Design and Analysis of HBM Interface considering PPA
Team 8. Analysis of Power Integrity Effect on PLL Performance
Lecture 1. Class Overview
Lecture 2. Why is Interconnection Design so Important
Lecture 3. Basics of Transmission Line Theory
Lecture 4. Impedance and Return Current Path
Lecture 5. Propagation and Reflection
Lecture 6. Terminations and Multiple Reflections
Lecture 7. Single-end Signaling
Lecture 8 Differential Line Theory
Lecture 9. Differential Signaling Schemes
Lecture 10. Common Mode Generation and EMI
Lecture 11. NEXT and FEXT
Lecture 12. ISI and Eye-Diagram
Lecture 13. High-Speed Channel and Jitter
Lecture 14. Pre-emphasis and Equalizers
Lecture 15. PDN Impedance Design for Power Integrity
Lecture 16. Decoupling Capacitors Designs and Resonances
Lecture 17. On-chip PDN Designs
Lecture 18. Power Supply Induced Jitter (PSIJ) Modeling and Designs
Lecture 19. PCB PDN Plane Resonance
Lecture 20. Power Waves in PCB and Resonance Control
Lecture 21. Ground Return Current Paths in Multi-layer PCB
Lecture 22. Design of Return Current Path and Isolation
Final Term Project Presentations
Team 1
Signal Integrity Design and Analysis of DPDT for 5G NR FR2
Team 2
Signal Integrity Analysis of D2D Interface for Chiplet
Team 3
Signal Integrity of On-chip AHB Bus
Team 4
Signal Integrity Analysis of RDL Interposer
Team 5
Introduction to PAM-N Signaling Estimation Method
Team 6
Signal Integrity Analysis and Design of Bump-less Channel
Team 7
Design and Analysis of HBM Interface considering PPA
Team 8
Analysis of Power Integrity Effect on PLL Performance
Team 9
Analysis of High-speed Bus in Full Wafer Scale Chip